Active matrix display devices, and their manufacture

ABSTRACT

Physical barriers ( 210 ) are present between neighbouring pixels ( 200 ) on a circuit substrate ( 100 ) of an active-matrix display device, such as an electroluminescent display formed with LEDs ( 25 ) of organic semiconductor materials. The invention forms at least parts of the barriers ( 210 ) with metal or other electrically-conductive material ( 240 ) that is insulated ( 40 ) from the LEDs but connected to the circuitry ( 4, 5, 6, 9, 140, 150, 160 , T 1 , T 2 , Tm, Tg, Ch etc.) within the substrate ( 100 ). This conductive barrier material ( 240 ) may back up or replace, for example, matrix addressing lines ( 150 ) and/or form an additional component either within the pixel array or outside. The additional component comprising the conductive barrier material ( 240 ) is advantageously a capacitor (Ch), or an inductor (L) or transformer (W), or even an aerial.

This invention relates to active-matrix display devices, particularlybut not exclusively electroluminescent displays using light-emittingdiodes of semiconducting conjugated polymer or other organicsemiconductor materials. The invention also relates to methods ofmanufacturing such devices.

Such active-matrix electroluminescent display devices are known,comprising an array of pixels present on a circuit substrate, whereineach pixel comprises an electroluminescent element, typically of organicsemiconductor material. The electroluminescent elements are connected tocircuitry in the substrate, for example drive circuitry that includessupply lines and matrix addressing circuitry that includes addressing(row) and signal (column) lines. These lines are generally formed bythin-film conductor layers in the substrate. The circuit substrate alsoincludes addressing and drive elements (typically thin-film transistors,hereafter termed “TFT”s) for each pixel.

In many such arrays, physical barriers of insulating material arepresent between neighbouring pixels in at least one direction of thearray. Examples of such barriers are given in published United Kingdompatent application GB-A-2 347017, published PCT patent applicationWO-A1-99/43031, published European patent applications EP-A-0 895 219,EP-A-1 096 568, and EP-A-1 102 317, the whole contents of which arehereby incorporated herein as reference material.

Such barriers are sometimes termed “walls”, “partitions”, “banks”,“ribs”, “separators”, or “dams”, for example. As can be seen from thecited references, they may serve several functions. They may be used inmanufacture to define electroluminescent layers and/or electrode layersof the individual pixels and/or of columns of pixels. Thus, for example,the barriers prevent pixel overflow of conjugate polymer materials thatmay be ink-jet printed for red, green and blue pixels of a colourdisplay or spin-coated for a monochrome display. The barriers in themanufactured device can provide a well-defined optical separation ofpixels. They may also carry or comprise conductive material (such asupper electrode material of the electroluminescent element), asauxiliary wiring for reducing the resistance of (and hence the voltagedrops across) the common upper electrode of the electroluminescentelements.

Active-matrix liquid-crystal displays (AMLCDs) similarly comprise acircuit substrate on which an array of pixels is present. In the AMLCDcase, upstanding spacers (pillars, for example) are present on thecircuit substrate between at least some of the neighbouring pixels.These spacers support the overlying opposite plate of the display overthe active-matrix circuit substrate to define the cell spacing in whichthe liquid crystal material is accommodated. For the purpose of thepresent invention when applied to AMLCDs, the spacers/pillars betweenpixels of an AMLCD will be compared with the barriers between pixels ofan active-matrix electroluminescent display (AMELD) and will be termed“barriers”.

It is an aim of the present invention to exploit, develop, adapt and/orextend particular features of active-matrix display devices, so as topermit improvement and/or enhancement of the performance and/orcapabilities of the device in a manner that is compatible with the basicdevice structure, its layout and its electronics.

According to one aspect of the present invention, there is provided anactive-matrix display device (for example an AMELD or an AMLCD) havingthe features set out in claim 1.

In accordance with the invention, the physical barriers between pixelsare used to provide connections into and/or out of the circuitsubstrate, and may provide additional components of the device.

Thus, these pixel barriers are partly (possibly even predominantly) ofelectrically-conductive material, typically metal. This conductivebarrier material is connected with a circuit element within the circuitsubstrate, while also being insulated at least at the sides of thebarriers adjacent to the pixel display elements. The said circuitelement in the circuit substrate may take a variety of forms, dependingon the particular improvement or enhancement or adaptation being made.Typically, it may be one or more thin-film elements of the groupcomprising: a conductor layer; an electrode connection; a supply line;an addressing line; a signal line; a thin-film transistor; a thin-filmcapacitor.

Much versatility is possible in accordance with the invention. Variousstructural features can be adopted for the pixel barriers. Thus, theconductive barrier material may extend as, for example, a line acrossthe array, or it may be localised to, for example, individual pixels orgroups of pixels or to other device areas.

Where the conductive barrier material is used to form an additionalcomponent, that component may be formed inside or outside the pixelarray. As compared with connecting an external component, theintegration of this additional component with pixel barrier technologycan be used to enhance device performance at reduced cost and in compactareas within the display device.

At least some lengths of the conductive barrier material may simplyserve as a back-up or even as a replacement for at least part of athin-film conductor line of the circuit substrate, for example anaddress (row) line, a signal (column) line or a supply line. Thus, theconductive barrier material may provide (or at least back up) theaddressing lines (row conductors) over most of their length to reducevoltage drops along the addressing lines. In a case such as this, thebarriers may be predominantly of conductive material (typically metal),or they may be predominantly of insulating material with a conductivecoating.

Barrier structures used in accordance with the invention may beconstructed with a metal core. This metal core can be used in variousways.

The metal core may itself provide the conductive barrier material thatis connected with the circuit element in the substrate. It may have aninsulating coating on at least its sides.

A metal coating can be provided on an insulating coating on the metalcore. This metal coating may be connected to another circuit element. Inone particularly useful form, the metal core, insulating coating andmetal coating may together form a capacitor, for example an individualholding capacitor for each respective pixel. Thus, the pixel barriersmay comprise separately insulated lengths, one or more of which mayprovide a capacitor having this metal-insulator coated barrierstructure.

However, the metal core does not need to be connected to a circuitelement in the substrate. Thus, for example, when the barrier comprisesa metal coating on an insulating coating on a metal core of the barrier,the metal coating may provide the conductive barrier material that isconnected with the circuit element in the substrate. The metal core maybe, for example, a ferromagnetic core of an inductor or transformer thatis integrated in this manner into the display device.

Thus, the barriers may comprise separately insulated portions, one ormore of which provide a capacitor, an inductor or a transformer havingthese coated barrier structures. This separate capacitor or inductor ortransformer length may be located within the pixel array, or it may belocated outside the pixel array but still formed on the circuitsubstrate in the same process steps as the pixel barriers.

Other separately insulated conductive portions of the barriers may servedifferent functions. They may be used, for example, to back-up or toreplace conductor lines of the circuit substrate and/or to forminterconnections.

Instead of using a metal core, a metal coating of the barrier may beused to provide the conductive barrier material that is connected withthe circuit element in the substrate.

According to another aspect of the present invention, there are alsoprovided advantageous methods of manufacturing such an active-matrixdisplay device.

Various advantageous features and feature-combinations in accordancewith the present invention are set out in the appended Claims. These andothers are illustrated in embodiments of the invention that are nowdescribed, by way of example, with reference to the accompanyingdiagrammatic drawings, in which:

FIG. 1 is a circuit diagram for four pixel areas of an active-matrixelectroluminescent display device which can be provided with conductivebarrier material in accordance with the invention;

FIG. 2 is a cross-sectional view of part of the pixel array and circuitsubstrate of one embodiment of such a device, showing one example of aconductive barrier construction connected to a TFT source or drain linein accordance with the invention;

FIG. 3 is a cross-sectional view of part of the pixel array and circuitsubstrate of a similar embodiment of such a device, showing anotherexample of a conductive barrier construction connected to a TFT gateline in accordance with the invention;

FIG. 4 is a circuit diagram, similar to that of FIG. 1, but showing theuse of pixel barriers with conductive barrier material to replace mostof the addressing lines;

FIG. 5 is a cross-sectional view through side-by-side barriers, eachwith conductive barrier material for a particular embodiment of a devicein accordance with the invention,

FIG. 6 is a plan view of four pixel areas showing a specific example oflayout features for a particular embodiment of a device in accordancewith the invention, with side-by-side conductive barriers, for example,with the cross-sectional view of FIG. 5 taken on the line V-V of FIG. 6;

FIG. 7 is a plan view of another example of layout features for aparticular embodiment of a device in accordance with the invention, withtransverse conductive barriers;

FIG. 8 is a sectional view of a device part with yet another example ofa conductive barrier construction using a metal coating in accordancewith the invention;

FIG. 9 is a cross-sectional view of a conductive barrier constructionthat additionally includes a metal coating to form a capacitorembodiment in accordance with the invention;

FIG. 10 is a plan view of transverse barrier layout features suitablefor a device having such a capacitor embodiment in accordance with theinvention;

FIG. 11 is a cross-sectional view of a conductive barrier constructionin an inductor embodiment in accordance with the invention;

FIG. 12 is a plan view of layout features suitable for such an inductorembodiment;

FIG. 13 is a plan view of layout features suitable for a transformerembodiment, having a cross-section similar to that of FIG. 12;

FIGS. 14 to 16 are sectional views of a device part such as that of FIG.2 or FIG. 3 at stages in its manufacture with one particular embodimentin accordance with the invention; and

FIG. 17 is a sectional view a device part at the FIG. 16 stage,illustrating a modification in the insulation of the conductive barriermaterial that is also in accordance with the present invention.

It should be noted that all the Figures are diagrammatic. Relativedimensions and proportions of parts of these Figures have been shownexaggerated or reduced in size, for the sake of clarity and conveniencein the drawings. The same reference signs are generally used to refer tocorresponding or similar features in modified and different embodiments.

Embodiments of FIGS. 1 to 3

The active-matrix electroluminescent display (AMELD) device of each ofthe FIGS. 1 to 3 embodiments comprises an array of pixels 200 on acircuit substrate 100 with matrix addressing circuitry. Physicalbarriers 210 are present between at least some of the neighbouringpixels in at least one direction of the array. At least some of thesebarriers 210 are constructed with conductive barrier material 240 thatis used as an interconnection in accordance with the present invention.Apart from this special construction and use of the barriers 210 inaccordance with the present invention, the display may be constructedusing known device technologies and circuit technologies, for example asin the background references cited hereinbefore.

The matrix addressing circuitry comprises transverse sets of addressing(row) and signal (column) lines 150 and 160, respectively, asillustrated in FIG. 1. An addressing element T2 (typically a thin-filmtransistor, hereafter termed “TFT”) is incorporated at each interceptionof these lines 150 and 160. FIG. 1 depicts, by way of example, onespecific pixel circuit configuration. Other pixel circuit configurationsare known for active matrix display devices, and it should readily beunderstood that the present invention may be applied to the pixelbarriers of such a device regardless of the specific pixel circuitconfiguration of the device.

Each pixel 200 comprises a current-driven electroluminescent displayelement 25 (21,22,23), typically a light-emitting diode (LED) of organicsemiconductor material. The LED 25 is connected in series with a driveelement T1 (typically a TFT) between two voltage supply lines 140 and230 of the array. These two supply lines are typically a power supplyline 140 (with voltage Vdd) and a ground line 230 (also termed “returnline”). Light emission from the LED 25 is controlled by the current flowthrough the LED 25, as altered by its respective drive TFT T1.

Each row of pixels is addressed in turn in a frame period by means of aselection signal that is applied to the relevant row conductor 150 (andhence to the gate of the addressing TFTs T2 of the pixels of that row).This signal turns on the addressing TFT T2, so loading the pixels ofthat row with respective data signals from the column conductors 160.These data signals are applied to the gate of the individual drive TFTT1 of the respective pixel. In order to hold the resulting conductivestate of the drive TFT T1, this data signal is maintained on its gate 5by a holding capacitor Ch that is coupled between this gate 5 and thedrive line 140,240. Thus, the drive current through the LED 25 of eachpixel 200 is controlled by the driving TFT T1 based on a drive signalapplied during the preceding address period and stored as a voltage onthe associated capacitor Ch. In the specific example of FIG. 1, T1 isshown as a P-channel TFT, whereas T2 is shown as an N-channel TFT.

This circuitry can be constructed with known thin-film technology. Thesubstrate 100 may have an insulating glass base 10 on which aninsulating surface-buffer layer 11, for example, of silicon dioxide isdeposited. The thin-film circuitry is built up on the layer 11 in knownmanner

FIGS. 2 and 3 show TFT examples Tm and Tg, each comprising: an activesemiconductor layer 1 (typically of polysilicon); a gate dielectriclayer 2 (typically of silicon dioxide); a gate electrode 5 (typically ofaluminium or polysilicon); and metal electrodes 3 and 4 (typically ofaluminium) which contact doped source and drain regions of thesemiconductor layer 1 through windows (vias) in the over-lyinginsulating layer(s) 2 and 8. Extensions of the electrodes 3, 4 and 5 mayform, for example, interconnections between the elements T1, T2, Ch andLED 25, and/or at least part of the conductor lines 140, 150 and 160,depending on the circuit function provided by the particular TFT (forexample, the drive element T1 or the addressing element T2 or anotherTFT of the circuit substrate). The holding capacitor Ch may be formedsimilarly, in known manner, as a thin-film structure inside the circuitsubstrate 100.

The LED 25 typically comprises a light-emitting organic semiconductormaterial 22 between a lower electrode 21 and an upper electrode 23. In apreferred particular embodiment, semiconducting conjugated polymers maybe used for the electroluminescent material 22. For a LED that emits itslight 250 through the substrate 100, the lower electrode 21 may be ananode of indium tin oxide (ITO), and the upper electrode 23 may be acathode comprising, for example, calcium and aluminium. FIGS. 2 and 3illustrate a LED construction in which the lower electrode 21 is formedas a thin film in the circuit substrate 100. The subsequently-depositedorganic semiconductor material 22 contacts this thin-film electrodelayer 21 at a window 12 a in a planar insulating layer 12 (for exampleof silicon nitride) that extends over the thin-film structure of thesubstrate 100.

As in known devices, the devices of FIGS. 1 to 4 in accordance with thepresent invention include physical barriers 210, between at least someof the neighbouring pixels in at least one direction of the array. Thesebarriers 210 may also be termed “walls”, “partitions”, “banks”, “ribs”,“separators”, or “dams”, for example. Depending on the particular deviceembodiment and its manufacture, they may be used in known manner, forexample:

-   -   to separate and prevent overflow of a polymer solution between        the respective areas of the individual pixels 200 and/or columns        of pixels 200, during the provision of semiconducting polymer        layers 22;    -   to provide a self-patterning ability on the substrate surface in        the definition of the semiconducting polymer or other        electroluminescent layers 22 for the individual pixels 200        and/or for columns of pixels 200 (and possibly even a        self-separation of individual electrodes for the pixels, for        example an individual bottom layer of the upper electrodes 23);    -   to act as a spacer for a mask over the substrate surface during        the deposition of at least an organic semiconductor material 22        and/or electrode material;    -   to form opaque barriers 210 for a well-defined optical        separation of the pixels 200 in the array, when light 250 is        emitted through the top (instead of, or as well as, the bottom        substrate 100).

Whatever their specific use in these known ways, at least some insulatedlengths of the physical barriers 210 in embodiments of the presentinvention are constructed and used in a special manner. Thus, the pixelbarriers 210 of FIGS. 2 to 4 comprise metal 240 (or otherelectrically-conductive material 240) that is insulated at their sidesadjacent the LEDs 25 and that are connected to and/or from one or morecircuit elements of the circuit substrate 100. This circuit element maytake a variety of forms, depending on the particular improvement orenhancement or adaptation being made. Typically, it may be one or morethin-film elements of the group comprising: a conductor layer and/or anelectrode connection 4, 5, 6; a supply line 140; an addressing line 150;a signal line 160; a thin-film transistor T1, T2, Tm, Tg; a thin-filmcapacitor Ch.

In the embodiment of FIG. 2, the circuit element connected to theconductive barrier material 240 is an extension of the source and/ordrain electrode of TFT Tm. It may form a signal (column) line 160, forexample, of the substrate circuitry when Tm is T2, or a drive line 140when Tm is T1. In the embodiment of FIG. 3, the circuit elementconnected to the conductive barrier material 240 is an extension of thegate electrode 5 of TFT Tg. It may form an addressing (row) line 150,for example, of the substrate circuitry when Tg is T2.

The pixel barriers 210 in the embodiments of FIGS. 2 to 4 arepredominantly of electrically-conductive material 240, 240 x, preferablymetal for very low resistivity (for example aluminium or copper ornickel or silver). The barriers 210 of FIGS. 2 and 3 comprise a bulk orcore of the conductive material that has an insulating coating 40 on itssides and on its top.

As shown in FIGS. 2 and 3, the bottom connections of the conductivebarrier material 240 to the circuit element 4,5 occur at connectionwindows 12 b in the intermediate insulating layer 12. However, it shouldbe understood that these windows 12 b may often not be in the same planeas the TFT Tm, Tg. In particular, there is generally insufficient spacebetween the source and drain electrodes 3 and 4 of TFT Tg to accommodatea window 12 b. Thus, the window 12 b is depicted in broken outline inFIG. 3 to indicate its location outside the plane of the drawing paper.

Addressing Line Barrier Embodiment of FIG. 4

The conductive barrier material 240 connected to a TFT gate line (as inFIG. 3, for example) may provide at least part of the addressing (row)lines 150. One such embodiment is illustrated in FIG. 4, wherein most ofthe line 150 is formed by the conductive barrier material 240.

Line resistance can be significantly reduced by using the conductivebarrier material 240 to replace or to back up the conductor line 150 ofthe circuit substrate 10. Thus, along the line 240 (150), the conductivebarrier material 240 has a cross-sectional area that is at least twice(possibly even an order of magnitude) larger than that of the conductorlayer that typically provides a gate line 5 (150) of TFT Tg in thecircuit substrate 100. Typically, the conductive barrier material 240may have a thickness Z that is a factor of two or more (for example atleast five times) larger than the thickness z of this conductor layer 5(150) in the circuit substrate 100. In a specific example Z may bebetween 2 μm and 5 μm as compared with 0.5 μm or less for z. Typically,the conductive barrier material 240 may have a line width Y that is thesame width (or even at least twice as large) as the line width y of theconductor layer 140. In a specific example Y may be 20 μm as comparedwith 10 μm for y. Furthermore, the gate line 5 (150) is typically ofdoped polysilicon, whereas the conductive barrier material 240 istypically metal having a much higher conductivity.

Multi-Conductor Barrier Embodiments of FIGS. 5 and 6

FIG. 5 illustrates a composite of two side-by-side barriers 210 and 210x, each comprising a metal core 240, 240 x insulated with a respectivecoating 40, 40 x. This side-by-side multi-conductor barrier structure210,21 x can be designed and used in a variety of ways. In one form, forexample, the metal cores 240 and 240 x may form (or back up) paralleladdressing and supply lines 150 and 140 respectively. In another form,for example, one of the barriers 210 may be divided into insulatedportions that provide an additional component, for example a capacitoras described below with reference to FIGS. 9 and 10. FIG. 6 gives oneexample of a suitable pixel layout, in which the matrix thin-filmcircuit area of the substrate 100 is designated as 120.

Modified Multi-Conductor Barrier Layout Embodiment of FIG. 7

In the modified layout of FIG. 7, the two barriers 210 and 210 x (eachcomprising a metal core 240, 240 x insulated with a respective coating40, 40 x) are arranged transverse to each other. In this case, barrier210 x (with connections to substrate TFT Tm as T2) may be used to backup or replace the column lines 160. The barrier 210 (with connections tosubstrate TFT Tg as T2) may be used to back up or replace the row lines150. Alternatively, the. barrier 210 (with connections to substrate TFTTm as T1) may be used to back up or replace the supply lines 140.

Alternative Conductive Barrier Embodiment of FIG. 8

In the embodiments of FIGS. 2, 3, and FIG. 5, barriers 210 and 210 x areshown as being predominantly of conductive material 240 and 240 x. FIG.8 shows a modified embodiment wherein the barrier 210 is predominantlyof insulating material 244. In this case, vias 244 b are etched ormilled through the insulating material 244 to the circuit element 4, 5in the circuit substrate 100. A metal coating 240 provides theconductive barrier material that extends on top of the insulatingbarrier 210 and in the vias 244 b therethrough. This alternativeconductive barrier construction is particularly suitable for embodimentsin which the conductive barrier material 240 backs up or replacesthin-film conductor lines (such as lines 140, 150 and 160) of thecircuit substrate 100.

The metal coating 240 of this barrier 210 may be formed simultaneouslywith a main part 23 a of the upper electrode 23 of the LED 25, in aself-aligned manner. Thus, a layer of metal may be depositedsimultaneously for the metal coating 240 and electrode 23 which areseparated by a shadow-masking effect of an overhang shape in the side ofthe barrier 210, as illustrated in FIG. 12. This is one possible processembodiment for forming barrier interconnects 210, 240 in accordance withthe present invention. FIGS. 15 to 17 illustrate other processembodiments for barrier interconnects 210, 240 that are predominantly ofmetal.

Capacitor and Other Multi-Conductor Barrier Embodiments of FIGS. 9 and10

The FIG. 9 embodiment is similar to those of FIGS. 2, 3, and 5, inhaving insulated lengths of the barrier 210 that comprise a metal core240 as the main conductive barrier material. This metal core 240 isconnected with the circuit element 4 or 5 etc. in the substrate 100 andhas an insulating coating 40 on thereon.

However the embodiment of FIG. 9 additionally comprises a metal coating240 c that is present on the insulating coating 40, over the top andsides of the core 240. This metal coating 240 c is connected to anothercircuit element of, for example, the substrate 100 such as element 5,4,etc. of another TFT.

This structure of FIG. 9 is more versatile than that of FIGS. 2, 3 and5. It permits the metal core 240 and metal coating 240 c to be used fordifferent purposes, for example, to back-up or even replace the lines140, 150 or 160, so reducing their line resistance. The metal coating240 c may serve as a co-axial shield for the signal on the core line240. Alternatively, the metal coating 240 c may be localised to specificlocations along the barrier 210 where particular connections orcomponents are required, for example at individual pixels or sub-pixels.

Instead of shielding, this multi-conductor structure 240, 240 c for thebarrier 210 c might be used to overlap two lines; for example, a back-upor replacement barrier line 140 (including core 240) with a back-up orreplacement barrier line 150 (including coating 240 c). In this case,however, the thickness and dielectric properties of the insulatingcoating 40 need to be chosen to reduce parasitic capacitance andcoupling between these lines 140 and 150.

Of particular importance is an embodiment in which the multi-conductorstructure 240, 240 c of FIG. 9 is designed to form a capacitor C with acapacitor dielectric 40. Thus, separate and/or insulated lengths of themetal core 240, insulating coating 40 and metal coating 240 c maytogether form a capacitor C connected between the substrate circuitelements 4, 5, etc.

Such a capacitor may be, for example, the individual holding capacitorCh for each respective pixel 200 which is connected between the supplyline 140 (main electrode line 4 of TFT T1, Tm) and the gate line 5 ofTFT T2, Tg (and main electrode line 3 of TFT T1, Tm). FIG. 10illustrates a suitable pixel layout with this holding capacitor barrier210 c, Ch.

Inductor and Other Multi-Metal Barrier Embodiments of FIGS. 11 to 13

FIGS. 11 to 13 illustrate barrier embodiments 210 d with a metal core240 m that is not electrically connected to a circuit element of thedevice. In this case the conductive barrier material 240 connected tothe thin-film substrate circuit element is the metal coating on theinsulating coating 40 on the metal core 240 d. Such a structure isuseful for providing the display with an inductor or transformer havinga ferromagnetic core 240 d of, for example, nickel.

FIG. 12 illustrates an inductor embodiment, whereas FIG. 13 illustratesa transformer embodiment. In each case, the layout pattern of the metalcoating 240 and the thin-film substrate metal tracks 9 are chosen (inrelation to their connecting vias 12 b) to form a winding conductoraround the ferromagnetic core 240 d. Both this coating 240 and thetracks 9 are of the non-ferromagnetic material (for example, aluminium).The coating 240 and tracks 9 form a single coil in the inductor L (FIG.12). In the transformer W (FIG. 13), the coating 240 and tracks 9 formboth a primary coil (240 p, 9 p) and a secondary coil (240 s, 9 s).

These components L and/or W can be used in various ways. They canfacilitate power saving, especially in displays of very large area.Their integration with pixel barrier technology can be used to enhancedevice performance (for example, higher Q value) at low cost and withincompact areas of the display device. A reduction in size may beachievable for equipment that comprises such a display device inaccordance with the invention, as compared with adding the componentoutside of the display device.

Process Embodiment of FIGS. 14 to 16

Apart from constructing and using its barriers 210 with conductivematerial 240, the active-matrix electroluminescent display of a devicein accordance with the present invention may be constructed using knowndevice technologies and circuit technologies, for example as in thecited background references.

FIGS. 14 to 16 illustrate novel process steps in a particularmanufacturing embodiment. The thin-film circuit substrate 100 with itsupper planar insulating layer 12 (for example, of silicon nitride) ismanufactured in known manner. Connection windows (such as vias 12 a, 12b, 12 x etc.) are opened in the layer 12 in known manner, for example byphotolithographic masking and etching. However, in order to manufacturea device in accordance with the present invention, the pattern of thesevias include the vias 12 b, 12 x that expose elements 4, 5, etc. forbottom connection with the conductive barrier material 240, 240 x, 240c. The resulting structure is illustrated in FIG. 13. This stage iscommon regardless of whether the barriers 210 have a metal core as inFIGS. 2, 3, 5, 9, and 11 or are predominantly of insulating material asin FIG. 8.

The formation of barriers 210 predominantly of insulating material hasbeen described above with reference to FIG. 8. Suitable process stepsfor barriers 210 with a metal core will now be described with referenceto FIGS. 15 and 16.

In this case, electrically-conductive material for the barriers 210 isdeposited on the insulating layer 12 at least in its vias 12 a, 12 b, 12x etc. The desired lengths and layout pattern for the barriers 210 isobtained using known masking techniques. FIG. 15 illustrates anembodiment in which at least the bulk 240 of the conductive barriermaterial (for example, copper or nickel or silver) is deposited byplating. In this case, a thin seed layer 240 a of, for example, copperor nickel or silver is first deposited over the insulating layer 12 andits vias 12 a, 12 b, 12 x etc, the barrier layout pattern is definedwith a photolithographic mask, and then the bulk 240 of the conductivebarrier material is plated to the desired thickness. The resultingstructure is illustrated in FIG. 15.

Then, using CVD (chemical vapour deposition), insulating material (forexample silicon dioxide or silicon nitride) is deposited for theinsulating coating 40. The deposited material is left on the sides andtop of the conductive barrier material by patterning using knownphotolithographic masking and etching techniques, as illustrated in FIG.16.

Thereafter the manufacture is continued in known manner. Thus, forexample, conjugate polymer materials 22 may be inkjet printed orspin-coated for the pixels 200. The barriers 240,40 with theirinsulating coating 40 can be used in known manner to prevent polymeroverflow from the pixel areas in between the physical barriers 240,40.The upper electrode material 23 is then deposited.

Modified Process Embodiment of FIG. 17

This embodiment uses an anodisation treatment (instead of deposition) toprovide the insulating coating 40 at least at the sides of the barriers210 adjacent to the pixel areas. Typically, the conductive barriermaterial 240 may comprise aluminium. The desired lengths and layoutpattern of the deposited aluminium can be defined using knownphotolithographic masking and etching techniques. FIG. 17 shows thephotolithically-defined etchant-mask 44 retained on the top of thealuminium barrier pattern 240.

Then, an anodic insulating coating of aluminium oxide is formed on atleast the sides of the aluminium barrier material 240 using knownanodisation techniques. Thus, no extra mask is needed to define thelayout for this coating 40.

As illustrated in FIG. 17, the mask 44 can be retained during thisanodisation, in areas where it is desired to protect and form anun-insulated top connection area 240 t. In these areas, the anodiccoating is formed at only the sides of the aluminium barrier pattern240. The mask 44 may be removed before this anodisation, from areaswhere the anodic coating is required at both the sides and top of thealuminium barrier pattern 240. Alternatively, the mask 44 of aninsulating polymer or, for example, silicon dioxide or nitride may beretained in these areas where insulation is desired over the top of thebarrier 210 (240,40) in the manufactured device.

Further Embodiments

In the embodiments described so far, the conductive barrier material 240is a thick opaque metal, for example, aluminium, copper, nickel orsilver. However, other conductive materials 240 may be used, for examplea metal silicide or (less advantageously) a degenerately-dopedpolysilicon both of which may be surface-oxidised to form the insulatingcoating 40. If transparent barriers 210 are required, then ITO may beused for the conductive barrier material 240.

In addition to the components already described, barriers 210 withconductive material 240 may be used to form other components connectedto the substrate circuitry. Thus, for example, aerials may beconstructed at the periphery of the display, with coils 9,240 or withlong straight lines of conductive barrier material 240. Such aerials areuseful in, for example, a mobile phone having an active-matrix displayin accordance with the invention.

The specific embodiments disclosed above are active-matrixelectroluminescent display devices and the inventive use of the physicalbarriers 210 present in such devices between neighbouring pixels.However, similar principles may be applied to other active-matrixdisplay devices such as, for example, AMLCDs (active-matrixliquid-crystal displays), which also comprise a circuit substrate 100′on which an array of pixels 200′ is present and connected thereto.

In the AMLCD case, upstanding spacers 210′ are present on the circuitsubstrate 100′ between at least some of the neighbouring pixels 200′.The spacers 210′ serve to support an overlying opposite plate of thedisplay over the active-matrix circuit substrate 100′. They definethereby the cell spacing in which the liquid crystal material isaccommodated. As regards their layout configuration, these AMLCD spacers210′ may be localised pillars between pixels, or they may be short wallswith some longitudinal extension between pixels.

In a modification in accordance with the present invention, theseupstanding spacers 210′ of an AMLCD may be constructed with conductivematerial 240 similar to the physical barriers 210 disclosed above forAMELDs and may be similarly connected. Thus, the AMLCD may include novelspacers 210′ that

-   -   are formed partly (or even predominantly) of metal or another        conductive material 240, while being insulated at least at their        sides adjacent to the liquid-crystal pixel cells, and    -   provide connections into and/or out of the circuit substrate        100′ of the AMLCD to locally back-up or locally replace lengths        of a substrate conductor line (e.g. 150′, 160′) and/or to form        additional components (e.g. C, L, W) connected into the AMLCD.

The additional components (for example, capacitors, inductors,transformers and/or aerials) can be constructed with combinations ofconductive spacer material 240 and insulating spacer material 40 (and/or244) that are provided locally on the circuit substrate 100′ of theAMLCD, in a manner similar to that described above for composite barrierelements 210 in AMELD devices. They can be similarly connected withcircuit elements (4′, 5′, 6′, 150′, 160′, T1′, T2′, etc.) of the AMLCDcircuit substrate 100′, at windows 12 b in an intermediate insulatinglayer 12 on the circuit substrate 100′.

Thus, the composite spacer elements 210′ of an AMLCD in accordance withthe invention can be constructed and connected in a manner similar tothat of, for example, any one of the barrier elements 210 of FIGS. 3, 5,7 to 13, 16 or 17.

From reading the present disclosure, other variations and modificationswill be apparent to persons skilled in the art. Such variations andmodifications may involve equivalent and other features which arealready known in the art (for example in the cited backgroundreferences) and which may be used instead of or in addition to featuresalready described herein.

Although Claims have been formulated in this Application to particularcombinations of features, it should be understood that the scope of thedisclosure of the present invention also includes any novel feature orany novel combination of features disclosed herein either explicitly orimplicitly or any generalisation thereof, whether or not it relates tothe same invention as presently claimed in any Claim and whether or notit mitigates any or all of the same technical problems as does thepresent invention.

The Applicants hereby give notice that new Claims may be formulated toany such features and/or combinations of such features during theprosecution of the present Application or of any further Applicationderived therefrom.

Thus, for example, the present Application discloses a novel use ofconductive material in a pixel barrier on a circuit substrate of anactive-matrix display device, so as to connect with circuitry in thecircuit substrate of the device and to provide a back-up arid/or areplacement and/or an additional component that is integrated in thedevice.

According to one aspect, important novelty resides in such use ofconductive barrier material in the pixel barrier construction of anelectroluminescent display, and particularly in the type of barriersused between light-emitting diodes of organic semiconductor material.Thus, the present Application discloses what are generally novelfeatures of an active-matrix electroluminescent display device (and itsmanufacture), comprising: a circuit substrate on which an array ofpixels is present with physical barriers between at least some of theneighbouring pixels in at least one direction of the array; each pixelcomprising an electroluminescent element (for example, a current-drivenlight-emitting diode of organic semiconductor material); the circuitsubstrate comprising circuitry to which the electroluminescent elementsare connected (for example, matrix addressing and drive circuitry forthe array, preferably with thin-film circuit elements); and the physicalbarriers comprising one or more parts of metal and/or of conductivematerial that is connected with a circuit element in the circuitsubstrate (for example, with a thin-film conductor layer and/orelectrode connection and/or supply line and/or addressing line and/orsignal (column) line and/or a thin-film transistor and/or a thin-filmcapacitor) via connection windows that are present (for example, in anintermediate insulating layer) on the circuit substrate (for example,under the conductive barrier material).

According to another aspect, important novelty resides in the use ofmultiple parts of metal and/or conductive material in the constructionof pixel barriers of an active-matrix display device (whether an AMELDor an AMLCD) so as to provide additional components integrated in thedevice. Thus, one or more mutually insulated lengths (or other parts) ofthe pixel barrier layout may comprise a metal-insulator coated barrierstructure that provides a capacitor or (with a ferromagnetic core) aninductor, transformer or aerial. These novel barrier structures may belocalised to, for example, individual pixels or groups of pixels and/orto other device areas. Thus, the additional component may be formedinside or outside the pixel array, but still formed on the circuitsubstrate in the same process steps as the pixel barriers. Thecomponent-forming barrier length typically comprises one or morecoatings of metal, conductive and insulating materials and may have aconductive and/or metal core to the barrier. Where the component-formingbarrier length is located between pixels, it can be insulated (forexample, with an insulating layer/coating) at least at the sides of thebarriers adjacent to the display element.

1. An active-matrix display device comprising: a circuit substrate onwhich an array of pixels is present with physical barriers between atleast s some of the neighbouring pixels in at least one direction of thearray; each pixel comprising a display element; the circuit substratecomprising circuitry to which the display elements are connected; thephysical barriers comprising conductive material that is connected witha circuit element in the circuit substrate via contact windows in anintermediate insulating layer on the circuit substrate; and theconductive barrier material being insulated at least at the sides of thebarriers adjacent to the display elements.
 2. A device according toclaim 1, wherein the said circuit element in the circuit substrate is atleast one thin-film element of a group comprising: a conductor layer; anelectrode connection; a supply line; an addressing line; a signal line;a thin-film transistor; a thin-film capacitor.
 3. A device according toclaim 1 or claim 2, wherein at least insulated lengths of the barriercomprise a metal core that provides the conductive barrier material,which metal core is connected with the circuit element in the circuitsubstrate and has an insulating coating on at least its sides.
 4. Adevice according to claim 3, wherein a metal coating is present on theinsulating coating on the metal core and is connected to another circuitelement.
 5. A device according to claim 4, wherein the metal core,insulating coating and metal coating together form a capacitor, forexample an individual holding capacitor for each respective pixel.
 6. Adevice according to any one of the preceding claims, wherein at least aninsulated length of the barrier comprises a metal coating on aninsulating coating on a metal core of at least that length of thebarrier, and the metal coating provides the conductive barrier materialthat is connected with the circuit element in the substrate.
 7. A deviceaccording to claim 6, wherein the metal core is of nickel or anotherferromagnetic material, and the metal coating is of non-ferromagneticmaterial that is connected with a conductor track of non-ferromagneticmaterial in the substrate to form at least one coil of an inductor ortransformer that comprises the ferromagnetic metal core.
 8. A deviceaccording to claim 1 or claim 2, wherein at least insulated lengths ofthe barriers are predominantly of the conductive barrier material (andpreferably comprising metal).
 9. A device according to claim 1 or claim2, wherein the physical barrier is predominantly of insulating materialthrough which vias extend for connection with the circuit element in thecircuit substrate, and wherein a metal coating that provides theconductive barrier material extends on top of the physical barrier andin the vias through the physical barrier.
 10. A device according toclaim 1 or claim 8 or claim 9, wherein the circuit substrate comprisesmatrix addressing circuitry that is connected with transverse addressingand signal lines, and the conductive barrier material provides at leastpart of the addressing lines.
 11. A device according to claim 1 or claim2, wherein the conductive barrier material serves as an interconnectionbetween the said circuit element in the circuit substrate and a furthercircuit element of the device.
 12. A device according to any one of thepreceding claims, wherein the barriers are present betweenelectroluminescent display elements that comprise a light-emitting diodeof organic semiconductor material.
 13. A device according to any one ofclaims 1 to 11, wherein the barriers are spacers in an active-matrixliquid-crystal display.
 14. A method of manufacturing an active-matrixdisplay device according to any one of the preceding claims, includingthe steps of: (a) opening contact windows in the intermediate insulatinglayer on the circuit substrate to expose a part of the circuit elementof the circuit substrate; (b) forming the physical barriers on thecircuit substrate with insulation at least at the sides of the physicalbarriers adjacent to the pixel areas; and (c) providing the displayelements in the pixel areas in between the physical barriers, whereinthe conductive barrier material is provided by depositingelectrically-conductive material at least for connection at the contactwindows of the intermediate insulating layer.
 15. A method according toclaim 14, wherein the step (b) involves forming the physical barrierpredominantly of the electrically-conductive material, and an insulatingcoating is deposited on at least the sides of this conductive barriermaterial.
 16. A method according to claim 15, wherein at least the bulkof the conductive barrier material is deposited by plating.
 17. A methodaccording to claim 15, wherein the conductive barrier material comprisesaluminium, and the insulating coating is formed on at least the sides ofthe aluminium barrier material by anodisation.
 18. A method according toclaim 14, wherein the step (b) involves forming the physical barrierpredominantly of insulating material through which vias are formed forconnection with the circuit element at the contact windows of theintermediate insulating layer, and wherein the electrically-conductivematerial is deposited as a conductive coating on top of the physicalbarrier and in the vias through the physical barrier.
 19. A methodaccording to claim 18, wherein the conductive coating for the physicalbarrier and an upper electrode of the display element are depositedsimultaneously and are separated by a shadow-masking effect of anoverhang shape in the side of the physical barrier.
 20. A methodaccording to any one of claims 14 to 19, wherein the additional devicefeatures of any one of claims 2 to 13 are provided.